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Chris Danely

Managing Director and Senior Semiconductor Analyst at Citigroup Inc.

Chris Danely is a Managing Director and Senior Semiconductor Analyst at Citi, specializing in equity research within the technology sector with a focus on semiconductor companies such as Intel, Micron, and AMD. He covers 27 stocks and has maintained a track record with a documented success rate of approximately 53-61% and average returns per recommendation ranging from 3.7% to 7.6%, with a notably profitable buy rating on ON Semiconductor yielding over 200% return. Danely previously held the role of Managing Director at JP Morgan before joining Citi, where he is recognized for his expertise in the volatile semiconductor space. As a seasoned analyst and senior leader, Danely holds relevant securities licenses and is listed in industry directories for analyst coverage.

Chris Danely's questions to MICRON TECHNOLOGY (MU) leadership

Question · Q4 2025

Chris Danely asked for a breakdown of DRAM revenue contributions from DDR4, DDR5, and HBM, and how each contributes to incremental gross margin. He also followed up on Micron's gross margin trajectory, specifically what factors enabled the company to surpass 50% and what limiting factors remain.

Answer

Sumit Sadana, Chief Business Officer, noted that DDR4 (excluding LP4) was a low single-digit percentage of the business and that the relative margins between HBM and non-HBM DRAM are not directly comparable due to different business models and pricing dynamics. Mark Murphy, CFO, attributed the improved gross margins to better market conditions, particularly tight DRAM supply and improving NAND conditions, along with Micron's focus on higher-value SSD products and cost improvements. He also highlighted structural factors like low inventory, extended DDR4/LP4 life, HBM's silicon intensity, and long fab construction times as enabling margin expansion.

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Question · Q4 2025

Chris Danely sought clarification on Micron's DRAM revenue mix, specifically the contributions from DDR4, DDR5, and HBM, and the relative impact on incremental gross margins. He also asked Mark Murphy about the factors driving the company's return to 50%+ gross margins, what has changed, and the limiting factors for future margin expansion.

Answer

Sumit Sadana, EVP and Chief Business Officer, noted that DDR4 (excluding LP4) is a low single-digit percentage of the business, with its margins improving due to shortages. He explained that HBM pricing is set long-term, while other DRAM pricing is quarterly, and expects non-HBM DRAM margins to improve as the industry tightens. Mark Murphy, CFO, attributed the margin improvement to better market conditions (tight DRAM, improving NAND), higher DRAM margins than mid-2022, and the highest operating margin since November 2018. He cited NAND business improvement, constrained DRAM supply (low inventory, extended DDR4/LP4 life, HBM silicon intensity, long fab lead times), focus on high-value products, and cost improvements as drivers for continued margin expansion, expecting Q2 gross margin to increase.

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Question · Q2 2025

Questioned why current gross margins are significantly lower than in a previous cycle with similar revenue levels, and asked for clarification on the commentary about improving product mix while also having increased consumer exposure.

Answer

The company attributed the lower margins primarily to the challenging NAND industry environment, which has weighed on profitability, while DRAM margins remain healthy. The "consumer exposure" refers to a strong rebound in demand from consumer-facing customers after an inventory correction, which, combined with HBM, is tightening supply and enabling price increases. The long-term strategy remains focused on shifting the mix to high-value solutions.

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