Question · Q4 2025
Laura Chen asked about ASE's plans for various advanced packaging types, such as panel-based and chip-on-wafer-on-PCB, and how ASE will leverage its technology. She also inquired if the overall ATM gross margin could reach 30% or higher later in the year, given increasing advanced packaging contributions and favorable ASP trends.
Answer
Tien Wu discussed preparing for both larger (300mm wafer, 310x310 panel) and potentially smaller chiplet sizes, aiming for fully automated 300x300 panel production by year-end. He emphasized providing toolboxes for designers, including panel, CPO, and next-gen power delivery (VRM), to strengthen ASE's portfolio and R&D for system-level paradigm shifts. Joseph Tung reiterated confidence in ATM gross margins staying within the structural range and improving sequentially each quarter, reaching the upper end by H2. He noted further room for improvement with optimal ramp-up and expanding LEAP/testing, but stated they would assess margin guidelines one year at a time.
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