Rick Neaton

Rick Neaton inquired about QuickLogic's chiplet strategy, specifically how programmable logic is utilized in chiplet applications, the contemplated end uses, and the nature of the 'bridging' technology – whether it operates on a single chiplet or between multiple chiplets.

Answer

President and CEO Brian Faith explained that chiplets are highly relevant for aerospace & defense due to miniaturization needs and for pre-processing sensor signals, as well as for cybersecurity in the post-quantum era to enable adaptable hardware. He detailed that the bridging technology addresses interoperability gaps between different chiplet interfaces (e.g., UCIe flavors, BOW) by using programmable hardware (eFPGA) as a 'translator' for incompatible physical and protocol layers, citing positive feedback from recent industry events.

Rick Neaton of Rivershore Investment Research questioned the strategic pivot to prioritize the SRH FPGA test chip and Australis 2.0, which impacted Q3 revenue. He asked about the potential ramp-up timeline for the storefront business resulting from this decision and the level of customer engagement that justified the internally funded tape-out.

Answer

President and CEO Brian Faith explained that the decision was driven by an urgent DoD need for onshore, strategic rad-hard FPGAs, positioning QuickLogic for a multi-hundred-million-dollar market. He noted that test chip revenue could begin in early 2026, with potential volume production in early 2027. Faith confirmed he is directly engaged with these defense customers, which gave him the confidence to fund the tape-out, and clarified that this creates a new capability rather than displacing an existing vendor.

Rick Neaton of Rivershore Investment Research questioned the strategic decision to prioritize the SRH FPGA test chip and Australis 2.0 development over Q3 revenue, asking about the competitive positioning against major players, the potential ramp speed for the storefront business, the depth of customer engagement driving this shift, and whether the goal is to displace existing vendors or create a new market.

Answer

President and CEO Brian Faith explained that the decision was a strategic bet on a multi-hundred-million-dollar opportunity in the defense sector, driven by an accelerated need for onshore-fabricated, strategic rad-hard FPGAs. He confirmed deep engagement with large defense industrial base (DIB) customers whose requirements prompted the self-funded tape-out, the first in nearly a decade. Faith clarified that this initiative creates a new market category, offering an alternative to costly custom ASICs, rather than directly displacing existing offshore-manufactured FPGAs. He projected potential test chip revenue in early 2026, with volume production possible by early 2027.

Rick Neaton of Rivershore Investment Research inquired about the strategic decision to prioritize the SRH FPGA test chip and Australis 2.0 development, potentially sacrificing Q3 revenue. He asked about the expected ramp-up timeline for the storefront business, the depth of customer engagement justifying the tape-out, and whether this initiative aims to displace existing vendors or create a new market category.

Answer

President, CEO & Director Brian Faith explained that the decision was driven by an accelerated push from the Department of Defense for onshore, strategic rad-hard (SRH) FPGAs. He emphasized that this move positions QuickLogic to compete for hundreds of millions of dollars in a new market, as no comparable onshore production FPGAs currently exist. Faith confirmed he has direct customer engagement and high confidence in the investment, which he sees as an alternative to expensive custom ASICs rather than a displacement of existing FPGA vendors.

Rick Neaton of Rivershore Investment Research questioned the strategic decision to prioritize the SRH FPGA test chip and Australis 2.0 development, potentially sacrificing Q3 revenue. He asked about the ramp-up speed for the storefront business, the depth of engagement with defense customers, and whether this move is intended to displace existing competitors like Intel or AMD.

Answer

President & CEO Brian Faith explained that the decision was a strategic bet to capture a potential multi-hundred-million-dollar market for onshore, radiation-hardened FPGAs, a market he believes is currently underserved. He stated that deep, direct customer discussions gave him the confidence to self-fund a tape-out for the first time in nearly a decade. Faith clarified that this initiative creates a new alternative for programs requiring onshore manufacturing, rather than directly displacing existing offshore products, and could offer an alternative to costly custom ASICs. He anticipates monetizing test chips in 2026, with potential volume production in early 2027.

Rick Neaton inquired about the strategic rationale for prioritizing the SRH FPGA test chip and Australis 2.0 development over near-term Q3 revenue. He asked for the expected ramp time for this defense business into the storefront model, the depth of customer engagement justifying the self-funded tape-out, and whether QuickLogic aims to displace an existing vendor or create a new market.

Answer

President and CEO Brian Faith explained the decision was driven by an accelerated, multi-hundred-million-dollar opportunity for onshore, strategic rad-hard FPGAs for new defense systems. He confirmed deep, direct engagement with customers gave him high confidence to authorize the company's first self-funded tape-out in nearly a decade. Faith clarified that QuickLogic is providing a new, onshore alternative for programs that cannot use offshore manufacturing, competing against the custom ASIC path rather than displacing a specific FPGA vendor.

Rick Neaton of Rivershore Investment Research inquired about the strategic decision to prioritize the SRH FPGA test chip and Australis 2.0 development, potentially sacrificing Q3 revenue. He asked about the competitive positioning against major players like Intel and AMD, the expected ramp-up timeline for the storefront business, the depth of customer engagement that prompted this shift, and whether the goal is to displace existing vendors or create a new market for onshore-fabricated FPGAs.

Answer

President, CEO & Director Brian Faith explained that the decision was made to pursue a multi-hundred-million-dollar opportunity in the defense sector, which has an urgent need for onshore-fabricated, strategic rad-hard (SRH) FPGAs. He stated that the move was based on direct, high-level discussions with defense industrial base customers. Faith clarified that this initiative creates a new market alternative to costly custom ASICs rather than displacing existing FPGAs. He projected potential test chip revenue in early 2026, with volume production possible by early 2027.

Rick Neaton of Rivershore Investment Research asked about the growth of the eFPGA IP business excluding the Strategic Rad Hard contract, sought an explanation for how the company can be non-GAAP profitable with negative cash flow, requested details on the Synopsys tool integration deal, and questioned what makes management's growth outlook for 2025 more confident than its outlook for 2024 was a year ago.

Answer

President and CEO Brian C. Faith stated that the non-Strategic Rad Hard eFPGA business is expected to be up over 50% year-over-year, demonstrating successful diversification. CFO Elias Nader explained that non-GAAP profitability with negative cash flow is possible due to strategic investments in R&D for Intel 18A and Synopsys tools, with the cash burn being minimal. Mr. Faith described the Synopsys deal as an OEM agreement to integrate Synplify into the Aurora tool suite, driven by demand from key defense customers. He expressed higher confidence for 2025 due to greater customer diversification, the competitive landscape change with Flex Logix, and having key contracts further along in the pipeline.