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    Yoshitsugu Yamamoto

    Senior Analyst at Mizuho Securities

    Yoshitsugu Yamamoto is a Senior Analyst at Mizuho Securities specializing in the coverage of advanced technology and semiconductor companies, with a notable focus on firms such as Tokyo Electron, Advantest Corp., and TOELY. He has demonstrated a strong track record, including providing actionable investment calls such as a maintained Buy rating on Tokyo Electron as of June 2025, and regularly participates in earnings calls and institutional research coverage for top Japanese technology manufacturers. Yamamoto's career at Mizuho Securities is distinguished by his deep engagement with core industry players, and he is recognized in public analyst listings by leading firms in the Japanese capital markets. His professional credentials include extensive expertise in equity research, though specific securities licenses and FINRA registrations are not publicly disclosed.

    Yoshitsugu Yamamoto's questions to TOELY leadership

    Yoshitsugu Yamamoto's questions to TOELY leadership • Q3 2025

    Question

    Inquired about the new production building in Miyagi, specifically confirming the targeted 3x reduction in lead time, the potential cost savings, and whether this represents a disruptive change in manufacturing strategy.

    Answer

    The target is indeed to reduce in-factory production lead time by a factor of three, alongside a 4x increase in labor productivity. While quantitative cost reduction is still being studied, savings are expected from automation and standardization. This is a disruptive change, part of a supply-chain-wide effort towards smart manufacturing using AI and robotics, with the Miyagi facility serving as a model case.

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    Yoshitsugu Yamamoto's questions to TOELY leadership • Q1 2025

    Question

    Asked about the timeline for winning a mass production POR for cryogenic etching for NAND, questioning if a lack of announcement by November would signify failure, and whether customer reluctance to switch suppliers could limit market share gains despite superior technology.

    Answer

    The decision to adopt is up to the customer, but TEL's product advantage is high, especially as the number of NAND layers increases. The company is confident it will win share from 2026 onward. The exact timing for a POR is uncertain due to factors like device structure changes and yield evaluations. Even if a POR is not announced soon, customers may still decide to replace competitor tools later to improve yield, as TEL's product evaluation is proceeding very steadily.

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    Yoshitsugu Yamamoto's questions to ADVANTEST (ATEYY) leadership

    Yoshitsugu Yamamoto's questions to ADVANTEST (ATEYY) leadership • Q1 2025

    Question

    Questioned the sustainability of the strong tester demand, asking about the company's production capacity, whether customers are over-ordering, and how test times for AI chips are trending. Followed up to ask if AI test times would decrease over the next year.

    Answer

    The company explained that the recent surge in demand was driven by unexpected factors, primarily a significant expansion in advanced packaging capacity and much longer-than-anticipated test times for new high-end AI logic devices. They noted that utilization for their latest SoC platform is near 100%. They find it difficult to predict future test times due to the rapid introduction of new, more complex devices, but are working to ensure flexible supply capacity.

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    Yoshitsugu Yamamoto's questions to ADVANTEST (ATEYY) leadership • Q1 2024

    Question

    Yoshitsugu Yamamoto from Mizuho Securities asked about the sustainability of the current tester demand, questioning whether customers are over-ordering or if growth will continue. He specifically focused on the impact of increasing test times for HPC and AI chips.

    Answer

    Makoto Nakahara, from the sales group, explained that the recent upward forecast revision was driven by unforeseen factors in the last month, including a significant expansion in advanced packaging capacity and much longer-than-expected test times for generative AI chips. He noted that utilization for the V93000 platform is near 100%. An executive added that test time unpredictability requires flexible supply capacity and close customer collaboration.

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